Phase Locking to an External Clock Using a PLL Circuit

Disciplining the Backplane Clock Using PLL on ClkIn

Use the phase-locked loop (PLL) circuit on an NI-Sync device to synchronize your system timing module's oscillator to an external reference clock. Once the oscillator is synchronized, you can route it to the backplane using the PXI_Clk10_In connector, which can then phase lock the PXI_Clk10 and PXIe_Clk100 signals to the oscillator. Using a PLL circuit, you can perform the following actions: