niSync Connect Trigger Terminals (VI)

Installed With: NI-Sync

Routes triggers through the PXI backplane, between devices, or between multiple chassis.

Once a terminal route is connected, you can invert the trigger signal at the destination terminal, synchronize the trigger to the rising or falling edge of a synchronization clock, fire the trigger asynchronously, or route the trigger to other trigger terminals.

You can also route clocks along some trigger lines by setting a full speed or divided synchronization clock as the source terminal.

Refer to Trigger Terminal Connections for a list of compatible trigger sources and destinations for this VI.

Note  The destination terminal determines the source of the trigger's synchronization clock. PFI and PFI_LVDS lines are in the front trigger zone, and PXI_Trig, PXI_Star, and PXIe_DStar lines are in the rear trigger zone. You can select the source of the full speed synchronization clock for a given trigger zone and adjust the speed of the divided clocks by using the niSync Property Node.

niSync Connect Trigger Terminals

ci32.gif

update edge (Rising Edge) specifies on which update edge of the synchronization clock to propagate the trigger.

Note  You must connect the source and destination terminals synchronously for this parameter to apply.

Valid values:

Rising Edge Propagates the trigger when the digital signal of the synchronization clock transitions from low to high, i.e. the rising edge.
Falling Edge Propagates the trigger when the digital signal of the synchronization clock transitions from high to low, i.e. the falling edge.
cstr.gif

synchronization clock specifies whether to use the full-speed or a divided synchronization clock to control when the trigger fires. The trigger will be synchronized with the rising or falling edge of the clock you select in this terminal.

Valid values:

Asynchronous The trigger is not synchronized to any clock.
Full Speed Clock Uses the full speed frequency of the synchronization clock to synchronize the trigger.
Divided Clock 1 Divides the synchronization clock by the value specified in the Clock Divisor 1 parameter of the niSync Property Node and uses the frequency of the divided clock to synchronize the trigger.
Divided Clock 2 Divides the synchronization clock by the value specified in the Clock Divisor 2 parameter of the niSync Property Node and uses the frequency of the divided clock to synchronize the trigger.
cio.gif

instrument handle specifies the instrument handle that you obtain from niSync Initialize.

cstr.gif

source terminal specifies the source of the trigger you want to connect to the destination terminal.

Valid values:

  • PXI_Trig<n>
  • PXI_Star<n>
  • PFI<n>
  • PFI_LVDS<n>
  • Ground
  • Synchronization Clock (Full Speed)
  • Synchronization Clock (Divided 1)
  • Synchronization Clock (Divided 2)
  • ClkIn
  • PXIe_DStarB
  • PXIe_DStarC<n>
cstr.gif

destination terminal specifies the destination trigger terminal that the source terminal will connect to.

Valid values:

  • PXI_Trig<n>
  • PXI_Star<n>
  • PFI<n>
  • PFI_LVDS<n>
  • PXIe_DStarB<n>
  • PXIe_DStarC
cerrcodeclst.gif

error in (no error) describes error conditions that occur before this node runs. This input provides standard error in functionality.

ci32.gif

invert specifies whether or not to invert the source terminal signal at the destination terminal.

Note  The source and destination must be connected synchronously to invert the signal.

Valid values:

Don't Invert Signal Keeps the digital signal of the source trigger terminal in its original format.
Invert Signal Inverts the digital signal of the source trigger terminal so that its rising edges become its falling edges, and vice versa.
iio.gif

instrument handle out returns the instrument handle that you obtain from niSync Initialize.

ierrcodeclst.gif

error out returns error conditions that occur after this node runs. This output provides standard error out functionality.