Reset Synchronization Clock PXI_Trig Line

Data
Type
Access Applies to Coercion High-Level VIs
String R/W N/A None None

Description

Specifies or returns which PXI_Trig terminal contains the update pulse used to reset the synchronization clock dividers. The default is none. You must set this value before you can reset synchronization clock dividers using an update pulse on a PXI_Trig line.

Note Note  
  • This property is supported only on signal-based devices.
  • This property is unsupported on the PXIe-6674T.

Property Node Path

niSync»Synchronization Clock Properties»Reset Synchronization Clock PXI_Trig Line