niSync_ConnectClkTerminals

C Function Prototype

ViStatus niSync_ConnectClkTerminals (ViSession vi, ViConstString sourceTerminal, ViConstString destinationTerminal);

Purpose

Connects a source clock terminal to a destination clock terminal. A clock terminal connection is characterized by its source terminal and destination terminal.

Parameters

Name Type Description
vi ViSession The session handle that you obtain from niSync_init. The handle identifies a particular instrument session.

sourceTerminal ViConstString Specifies the source terminal of the clock you would like to connect.

Valid Values:
NISYNC_VAL_CLKIN (Default Value)
NISYNC_VAL_CLK10
NISYNC_VAL_OSCILLATOR
NISYNC_VAL_DDS
NISYNC_VAL_PFILVDS0
NISYNC_VAL_PFILVDS1
NISYNC_VAL_PFILVDS2
NISYNC_VAL_PXIEDSTARC0
NISYNC_VAL_PXIEDSTARC1
NISYNC_VAL_PXIEDSTARC2
NISYNC_VAL_PXIEDSTARC3
NISYNC_VAL_PXIEDSTARC4
NISYNC_VAL_PXIEDSTARC5
NISYNC_VAL_PXIEDSTARC6
NISYNC_VAL_PXIEDSTARC7
NISYNC_VAL_PXIEDSTARC8
NISYNC_VAL_PXIEDSTARC9
NISYNC_VAL_PXIEDSTARC10
NISYNC_VAL_PXIEDSTARC11
NISYNC_VAL_PXIEDSTARC12
NISYNC_VAL_PXIEDSTARC13
NISYNC_VAL_PXIEDSTARC14
NISYNC_VAL_PXIEDSTARC15
NISYNC_VAL_PXIEDSTARC16

Note  Each PXIe_DStarC trigger is mapped to a single slot. This mapping is vendor specific. Your chassis documentation may describe this mapping in addition to the chassis.ini and pxisys.ini system description files the PXI Specification requires.
destinationTerminal ViConstString Specifies where to route the clock signal specified in the sourceTerminal.

Valid Values:
NISYNC_VAL_CLK10_IN (Default Value)
NISYNC_VAL_CLKOUT
NISYNC_VAL_BOARD_CLK
NISYNC_VAL_PFILVDS0
NISYNC_VAL_PFILVDS1
NISYNC_VAL_PFILVDS2
NISYNC_VAL_PXIEDSTARA0
NISYNC_VAL_PXIEDSTARA1
NISYNC_VAL_PXIEDSTARA2
NISYNC_VAL_PXIEDSTARA3
NISYNC_VAL_PXIEDSTARA4
NISYNC_VAL_PXIEDSTARA5
NISYNC_VAL_PXIEDSTARA6
NISYNC_VAL_PXIEDSTARA7
NISYNC_VAL_PXIEDSTARA8
NISYNC_VAL_PXIEDSTARA9
NISYNC_VAL_PXIEDSTARA10
NISYNC_VAL_PXIEDSTARA11
NISYNC_VAL_PXIEDSTARA12
NISYNC_VAL_PXIEDSTARA13
NISYNC_VAL_PXIEDSTARA14
NISYNC_VAL_PXIEDSTARA15
NISYNC_VAL_PXIEDSTARA16

Note  Each PXIe_DStarA trigger is mapped to a single slot. This mapping is vendor specific. Your chassis documentation may describe this mapping in addition to the chassis.ini and pxisys.ini system description files the PXI Specification requires.

Return Values