| microcode_ctl-1.17-33.31.el6_10.i686
[4.6 MiB] |
Changelog
by Eugene Syromiatnikov (2020-10-30):
- Update Intel CPU microcode to microcode-20201027 release, addresses
CVE-2020-8694, CVE-2020-8695, CVE-2020-8696, CVE-2020-8698
(#1893243, #1893238):
- Addition of 06-55-0b/0xbf (CPX-SP A1) microcode (in microcode.dat)
at revision 0x700001e;
- Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
microcode.dat) at revision 0x68;
- Addition of 06-a5-02/0x20 (CML-H R1) microcode (in microcode.dat)
at revision 0xe0;
- Addition of 06-a5-03/0x22 (CML-S 6+2 G1) microcode (in microcode.dat)
at revision 0xe0;
- Addition of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode (in microcode.dat)
at revision 0xe0;
- Addition of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode (in
microcode.dat) at revision 0xe0;
- Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
microcode-06-4e-03.dat) from revision 0xdc up to 0xe2;
- Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
microcode-06-55-04.dat) from revision 0x2006906 up to 0x2006a08;
- Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
microcode-06-5e-03.dat) from revision 0xdc up to 0xe2;
- Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode
(in microcode.dat) from revision 0x43 up to 0x44;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode (in microcode.dat)
from revision 0x1000157 up to 0x1000159;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode (in microcode.dat)
from revision 0x4002f01 up to 0x4003003;
- Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode (in
microcode.dat) from revision 0x5002f01 up to 0x5003003;
- Update of 06-5c-09/0x03 (APL D0) microcode (in microcode.dat) from
revision 0x38 up to 0x40;
- Update of 06-5c-0a/0x03 (APL B1/F1) microcode (in microcode.dat)
from revision 0x16 up to 0x1e;
- Update of 06-7a-08/0x01 (GLK-R R0) microcode (in microcode.dat)
from revision 0x16 up to 0x18;
- Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode (in microcode.dat)
from revision 0x78 up to 0xa0;
- Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in microcode.dat)
from revision 0xd6 up to 0xde;
- Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
microcode.dat) from revision 0xd6 up to 0xe0;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in microcode.dat)
from revision 0xd6 up to 0xde;
- Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
microcode (in microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in microcode.dat)
from revision 0xd6 up to 0xde;
- Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
microcode.dat) from revision 0xd6 up to 0xde;
- Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode (in microcode.dat)
from revision 0xca up to 0xe0.
|
| microcode_ctl-1.17-33.29.el6_10.i686
[3.9 MiB] |
Changelog
by Eugene Syromiatnikov (2020-06-17):
- Update Intel CPU microcode to microcode-20200609 release (#1826590):
- Fixed a typo in the release note file.
|
| microcode_ctl-1.17-33.26.el6_10.i686
[3.7 MiB] |
Changelog
by Eugene Syromiatnikov (2020-06-03):
- Update Intel CPU microcode to microcode-20200602 release, addresses
CVE-2020-0543, CVE-2020-0548, CVE-2020-0549 (#1795353, #1795357, #1827186):
- Update of 06-3c-03/0x32 (HSW C0) microcode from revision 0x27 up to 0x28;
- Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from revision 0x2e
up to 0x2f;
- Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from revision 0x25
up to 0x26;
- Update of 06-46-01/0x32 (HSW-H C0) microcode from revision 0x1b up to 0x1c;
- Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode from revision 0x21
up to 0x22;
- Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xd6
up to 0xdc;
- Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000151
up to 0x1000157;
- Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1) microcode
(in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2000065
up to 0x2006906;
- Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400002c
up to 0x4002f01;
- Update of 06-55-07/0xbf (CLX-SP B1) microcode from revision 0x500002c
up to 0x5002f01;
- Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from revision 0xd6
up to 0xdc;
- Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from revision 0xca
up to 0xd6;
- Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xca
up to 0xd6;
- Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from revision 0xca
up to 0xd6;
- Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xca
up to 0xd6;
- Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U V0) microcode
from revision 0xca up to 0xd6;
- Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision
0xca up to 0xd6;
- Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode from revision 0xca
up to 0xd6;
- Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xca up to 0xd6;
- Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from revision 0xca
up to 0xd6;
- Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xca up to 0xd6.
|
| microcode_ctl-1.17-33.23.el6_10.i686
[3.8 MiB] |
Changelog
by Eugene Syromiatnikov (2019-11-20):
- Do not update 06-55-04 (SKL-SP/W/X) to revision 0x2000065, use 0x2000064
by default (#1774635).
|
| microcode_ctl-1.17-33.19.el6_10.i686
[3.4 MiB] |
Changelog
by Eugene Syromiatnikov (2019-11-07):
- Fix the incorrect "Source2:" tag.
|
| microcode_ctl-1.17-33.17.el6_10.i686
[3.0 MiB] |
Changelog
by Eugene Syromiatnikov (2019-10-06):
- Do not update 06-2d-07 (SNB-E/EN/EP) to revision 0x718, use 0x714
by default (#1758382).
|
| microcode_ctl-1.17-33.14.el6_10.i686
[3.0 MiB] |
Changelog
by Eugene Syromiatnikov (2019-06-19):
- Intel CPU microcode update to 20190618 (#1717238).
|
| microcode_ctl-1.17-33.13.el6_10.i686
[3.0 MiB] |
Changelog
by Eugene Syromiatnikov (2019-06-02):
- Remove disclaimer, as it is not as important now to justify kmsg/log
pollution; its contents are partially adopted in README.caveats.
|
| microcode_ctl-1.17-33.11.el6_10.i686
[2.8 MiB] |
Changelog
by Eugene Syromiatnikov (2019-05-09):
- Intel CPU microcode update to 20190507_Public_DEMO (#1697960).
|
| microcode_ctl-1.17-33.9.el6_10.i686
[2.1 MiB] |
Changelog
by Eugene Syromiatnikov (2018-09-07):
- Fix disclaimer path in %post script.
|
| microcode_ctl-1.17-33.3.el6_10.i686
[1.8 MiB] |
Changelog
by Eugene Syromiatnikov (2018-07-19):
- Intel CPU microcode update to 20180703
- Add infrastructure for handling kernel-version-dependant microcode
- Resolves: #1574593
|
| microcode_ctl-1.17-33.1.el6.i686
[1.9 MiB] |
Changelog
by Petr Oros (2018-06-13):
- Intel CPU microcode update to 20180613.
- Resolves: #1573451
|
| microcode_ctl-1.17-32.el6.i686
[1.8 MiB] |
Changelog
by Petr Oros (2018-05-18):
- Update AMD microcode
- Resolves: #1574591
|
| microcode_ctl-1.17-25.7.el6_9.i686
[1.8 MiB] |
Changelog
by Petr Oros (2018-05-28):
- Update AMD microcode to 2018-05-24
- Resolves: #1576314
|
| microcode_ctl-1.17-25.6.el6_9.i686
[1.8 MiB] |
Changelog
by Petr Oros (2018-05-15):
- Update disclaimer text
- Resolves: #1575563
|
| microcode_ctl-1.17-25.4.el6_9.i686
[1.2 MiB] |
Changelog
by Petr Oros (2018-01-15):
- Use right upstream source for revert
- Resolves: #1533978
|
| microcode_ctl-1.17-25.2.el6_9.i686
[1.6 MiB] |
Changelog
by Petr Oros (2017-12-15):
- Update Intel CPU microde for 06-3f-02, 06-4f-01, and 06-55-04
- Add amd microcode_amd_fam17h.bin data file
- Resolves: #1527357
|
| microcode_ctl-1.17-25.el6.i686
[1.2 MiB] |
Changelog
by Petr Oros (2017-02-20):
- Revert microcode_amd_fam15h.bin to version from amd-ucode-2012-09-10
- Resolves: #1322525
|
| microcode_ctl-1.17-21.el6.i686
[775 KiB] |
Changelog
by Petr Oros (2015-11-11):
- Update microcode data file to 20151106 revision.
- Resolves: #1244968
- Remove bad file permissions on /lib/udev/rules.d/89-microcode.rules
- Resolves: #1201276
|
| microcode_ctl-1.17-20.el6.i686
[736 KiB] |
Changelog
by Petr Oros (2015-01-29):
- Update microcode data file to 20150121 revision.
- Resolves: #1123992
|
| microcode_ctl-1.17-19.el6.i686
[675 KiB] |
Changelog
by Petr Oros (2014-06-30):
- Update microcode data file to 20140624 revision.
- Resolves: #1113394
|
| microcode_ctl-1.17-17.el6_5.1.i686
[675 KiB] |
Changelog
by Petr Oros (2014-07-09):
- Update microcode data file to 20140624 revision.
- Resolves: #1110468
|
| microcode_ctl-1.17-17.el6.i686
[620 KiB] |
Changelog
by Anton Arapov (2013-09-09):
- Update to microcode-20130906.dat
- Resolves: rhbz#1005606
|
| microcode_ctl-1.17-15.el6_4.i686
[609 KiB] |
Changelog
by Anton Arapov (2013-08-30):
- Update to microcode-20120808.dat
- Resolves: rhbz#915957 rhbz#1002446
|
| microcode_ctl-1.17-14.el6.i686
[520 KiB] |
Changelog
by Anton Arapov (2012-10-22):
- Update microcode for AMD cpus to 2012-09-10
- Resolves: rhbz#867078
|
| microcode_ctl-1.17-11.el6.i686
[463 KiB] |
Changelog
by Anton Arapov (2012-02-17):
- Update microcode for AMD cpus to 20120117
- Resolves: rhbz#787757
|
| microcode_ctl-1.17-9.el6.i686
[444 KiB] |
Changelog
by Anton Arapov (2011-10-05):
- Update to microcode-20110915.dat
- Resolves: rhbz#696582
|
| microcode_ctl-1.17-4.el6.i686
[404 KiB] |
Changelog
by Anton Arapov (2010-11-24):
- Update to microcode-20101123.dat
- Make microcode_ctl event driven
- Resolves: rhbz#578107
|